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Open source drives collaboration and innovation. It is well established for software but still in its early days for hardware. Open source hardware will lower the barrier to entry and help achieve European sovereignty and reduce vendor lock-in.

Open hardware and RISC-V: an exciting opportunity for Europe

by Miquel Moretó, Osman Unsal, Adrian Cristal,
Jérôme Quévremont and Gaël Blondelle

With economies discovering the limits of the globalisation of the past three decades, the world is entering a new phase. In Europe, this phase is further driven by the need to protect European citizen’s security, and to assert sovereignty in key strategic technologies. Particular key technologies are semiconductors and computing. To retain the capability to compete in this key technology, European nations and companies have to rely on a set of common building blocks. These building blocks are best served through creating an open hardware environment.

Europe has traditionally been strong in building industries that are greater than the sum of their parts. This collective ecosystem is driven by small- to medium-sized enterprises (SMEs) as much as by larger companies. In this sense, an open hardware environment is the best avenue to enable these myriad actors to march in unison towards the main goal of creating a world-class hardware base.

The focus of this article is open source IP and chip design, including all the layers of the hardware compute stack from high-level synthesis languages down to EDA tools development. There are multiple initiatives for open hardware, examples include RISC-V ecosystem (, Open Compute, Open Hardware Repository ( and Open Source Hardware Organization

Among the alternatives, the RISC-V path has gained the most traction in Europe and accordingly this report proposes RISC-V as Europe’s open hardware solution of choice.

Key insights

  • Open source is a global framework for collaboration and innovation. It is well established for software, but still at an early stage for hardware. Open source delivers benefits across the whole landscape from HPC to cloud to IoT and AI.

  • Open source hardware comprises open hardware interfaces including the Instruction Set Architecture (ISA), the high-level hardware descriptions of core components (e.g. processing cores, caches, and peripheral memory controllers), process for fabrication, and electronic-design automation tools.

  • It is insufficient to merely release the hardware, as abandonware, in an open source repository to satisfy the funding agency. Open source foundations like the Eclipse Foundation and OpenHW Group are there to support research and industry players to create a real open source community and visibility.

  • Hardware has higher requirements for verification than software, with peculiarities to address by the governance of open source hardware projects. Hardware verification is more costly than development, so once verification is done, the design will likely be frozen, and should not evolve.

  • Open source collaboration enables a high degree of software/hardware co-design due to open interfaces and implementations across the whole software/hardware stack. An example is the collaboration between OpenHW and RedHat [5].

  • Open source hardware allows accessing source code (e.g. for certification) achieving such sovereignty, avoiding export controls and without depending on a specific vendor. Sovereignty in hardware design is especially strategic for cybersecurity, safety critical (e.g. automotive), defense and other specific sectors affecting national security [6].

  • Open source lowers the barrier to entry. In particular, permissive open source licensing (Apache, MIT, BSD…), as selected by the OpenHW Group, allows the integration of open source components in proprietary designs. In contrast, a GPL licence on IP forces the whole design to become GPL, since hardware has no equivalent to software’s dynamic loading. This leads to dual licensing approaches where the design made available under GPL is fully owned by a company that licences it under proprietary licensing terms for commercial use. The dual licensing model can enable the freedom for academic use when a company wants to be able to capture some of the value from commercialization of successful designs.

    Permissive licensing recently proved successful in the open source hardware realm, e.g. through the adoption of the academic PULP cores by OpenHW Group projects to mature them to production-grade IPs. This permissive open source licensing approach is gradually replacing the dual licence model.

  • Among open source hardware, RISC-V has so far gained the most traction in Europe.

  • RISC-V and open source hardware are great tools for use in education and academia, to help attract and retain talent.

Key recommendations

  • Europe needs to establish truly European solutions for computing. Open source hardware and RISC-V are seen as good leverages to increase European sovereignty and economy, in conjunction with the European Chips Act.

  • We propose RISC-V as Europe’s open hardware solution of choice for all domains ranging from embedded systems to HPC.

  • Hardware developers should release as much IP as possible in open source in order to promote collaboration between academia and industry.

  • We recommend the adoption of permissive open source licences, which have been more successful in driving adoption, and lowering barriers to collaboration between research, academia and industry.

  • Developers should leverage the experience, governance, and processes of existing open source foundations established in Europe in order to build an open source community and visibility.

  • Hardware engineers and students should be aware of open hardware and should be encouraged to contribute to open source hardware during their career or studies, as is common for software.

Open source governance and community building

The term “Open Source” was defined in the late 90’s by the Open Source Initiative (OSI), a created by a group of entrepreneurs that wanted to promote Free Software without using the term free, which is ambiguous in English with meanings both about “freedom” and “gratis”. An open source license is one that has been accepted by the OSI as being compliant with the open source definition, which emphasises no discrimination against persons or groups, and no discrimination against fields of endeavour, source code access, freedom to create derived works, and free redistribution.

Over the last 25 years, open source has enabled rapid innovation in the software industry and has become the preferred way of setting up global collaborations and ecosystems for core technologies and non-differentiating software. An enabler of this global collaboration is that open source licences, like the Apache Software Licence, the MIT or BSD licence for example are short and easily understood and applied worldwide. Those “permissive licences” have proven to be efficient to enable collaboration between research, industry and startups.

The bloom of open source has been supported by the rise of open source foundations as they developed their well structured open source governance framework as a set of rules and practices that guide the development of open source projects and the management of open source communities. For example, the Eclipse governance model is supported by an open and transparent development process that supports decision making, ensures vendor neutrality and provides world-class intellectual property management.

Strong open source governance supports growing a community because the rules of engagement are clear. Over the decade, most corporations have defined policies to allow their employees to contribute to open source software and it is time to extend this to open source hardware. As open source hardware is recent, most hardware developer teams have no prior open source experience and face a longer learning curve.

In the last decade, the principles of OSS governance have been extended to open source hardware, particularly in computing architecture. Indeed, much of modern hardware development, especially in areas like RISC-V processors, resembles software development. Thus, groups like the OpenHW Group are adopting open source models for hardware development, using licences like Apache/Solderpad.

But open source hardware projects are different from open source software, for example due to specific verification requirements, which has an effect on the way that the hardware description codebase is managed. The OpenHW Group’s industrial projects prepare intellectual property (IP) blocks (RISC-V cores, accelerators…) that will eventually get into integrated circuit designs. Once etched in silicon, any bug can cause catastrophic consequences. It is therefore necessary to fully verify open source hardware IP blocks before releasing them. Verifying a RISC-V processor core represents significantly more effort than designing it. Therefore, once the core is fully verified, the source code will likely be frozen, and should not evolve for that design.

The rise of an open Instruction Set Architecture

The advent of Artificial Intelligence applications in the embedded system market has raised the demand for high performance computing capabilities in embedded processors. This demand is presently coming from cloud based computing services for embedded applications and will involve more and more into edge computing devices featuring high computing power close to the final user or even to Internet-of-Things nodes. This reality opens a particularly favourable scenario for horizontally sharing the same computing platforms (instruction set architectures) in different contexts, ranging from the embedded market to the HPC market.

In this view, the appearance of the RISC-V instruction set (Patterson, 2016) (Waterman, 2013) on the embedded system scene is of particular interest, as it allows processor designers to join the high volumes of embedded solutions with the advantages of an open instruction set and software technology. As the software stack support matures for different market segments, RISC-V-based processors are making the jump from embedded systems to data-centre class CPUs and Supercomputing.

RISC-V originated in 2010 from a research project at the University of California, Berkeley and is now supported by the RISC-V International foundation counting about 4,000 members, among which are numerous major industrial actors in the ICT market ( RISC-V is composed of a base instruction set—divided into user and privilege sets—that has been finalised and will never change, extended in a modular fashion by a number of dedicated instruction sets targeting higher performance or specialised application domains. Interestingly, there is a vector processing extension, already ratified with the release of RVV1.0 ( The latest version of the extension is optimised for embedded systems, and ongoing discussion is aimed at optimising vector support for other domains such as HPC and AI. The matrix multiplication extension, expected to be defined and ratified in 2024; will expand the RISC-V applicability towards hardware support for modern AI applications. This illustrates the positive impact of open specifications evolving to address the needs of large communities.

The RISC-V initiative inherits the long history of RISC processors started in the 1980s from the research initiatives led by John Hennessy and David Patterson. In 2018, they received the ACM Turing award “for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry”. It is important to note that while RISC-V is an open ISA standard, this does not automatically imply open source hardware. However RISC-V has been the ISA of choice for most open hardware efforts, since the RISC-V ISA standard is free for both senses of the word.

At present, while several RISC-V proprietary and open products are emerging for the embedded market, there is limited availability of RISC-V HPC processors, either implementing vector computation or targeting general purpose HPC applications. The 45 nm vector-accelerated University of California, Berkeley Hwacha chip achieves 16.7 Double-Precision GFLOPS/W, while the 28 nm FDSOI Hwacha chip employs aggressive voltage biassing techniques to achieve power efficiency in variable load conditions. The SiFive’s U540 Quad-Core Processor addresses general purpose performance and exhibits a 6 GFLOPS theoretical peak at a 4.63 W board power consumption, showing the need for accelerator support to target breakthrough power efficiency.


In the past years, a few events have revealed European weaknesses and the need to regain control of key electronic sectors. The 2020 semiconductor shortage, which followed the COVID lockdowns, severely affected the European industry, in particular critical sectors such as automotive. The projected acquisition of Arm by NVIDIA in 2021 demonstrated to semiconductor manufacturers that a competitor could take the control of a then quasi-monopolistic supplier for their embedded computing architectures.

“Sovereignty” can have several embodiments: gaining full control over a critical asset, ensuring a sufficient availability of a critical asset, or making sure that no-one can prevent you from exploiting a critical asset. In the case of semiconductor manufacturing, the European investments deriving from the Chips Act are a way to increase control on the semiconductor supply chain for the sake of the European economy. In the case of open source hardware for computing solutions, the goal is to support the free flow of the technology, and ensure that European actors cannot be blocked from the use of a critical intellectual property.

A representative illustration of the protection against export restrictions that can be brought by open source lies in the ongoing economic confrontation between the USA and China. In 2019, the Chinese manufacturer Huawei was prevented from integrating Google proprietary apps (Maps, YouTube…) into their smartphones by then-president Donald Trump [1]. But he could not prevent the Chinese company from integrating Android, as the latter is available as open source. The Linux Foundation published a report [2] to explain and elaborate on open source and US export control [4].

On our continent, the European Commission has mandated a working group on sovereignty and published their “Recommendations and Roadmap for European Sovereignty in Open Source Hardware, Software, and RISC-V Technologies” [3]. From the conclusions, the Key Digital Technologies Joint Undertaking (KDT JU, now Chips JU) has carried out several calls for projects, which gave birth to the TRISTAN and ISOLDE open source hardware projects. Other calls and projects are expected to follow to increase the European impact in the open source hardware field.

Beyond the protection against quasi-monopolies and geopolitical issues, open source unleashes new avenues for business and innovation, through participation and collaboration of many stakeholders working towards the same goal – European leadership. Finally, adopting and contributing to open source hardware creates technical and business differentiators: the ability to customise and get a better architectural/energy/performance fit for one’s application; ability to perform white-box analyses for critical domains; sharing costs instead of purchasing IP… A stronger economy is a good factor to defend the future of our continent.

Finally, it is interesting to note that RISC-V International, the foundation that maintains and develops the ISA, has moved to Switzerland, which grants neutrality from national regulations.


This position paper has defined open source hardware, advocated for an open source hardware ecosystem based on the RISC-V standard, surveyed the state of the art in RISC-V open source hardware; and argued that RISC-V is a good choice to ensure European sovereignty.


Miquel Moretó leads the High Performance Domain Specific Architectures team at Barcelona Supercomputing Center.

Osman Unsal is co-manager of the Computer Architecture for Parallel Paradigms research group at Barcelona Supercomputing Center. His group has developed in-order and out-of-order RISC-V cores; as well as the RISC-V vector processing unit in the European Processor Initiative project.

Adrian Cristal is co-manager of the Computer Architecture for Parallel Paradigms research group at Barcelona Supercomputing Center.

Jérôme Quévremont is RISC-V and open hardware project leader at Thales Research & Technology. He serves as co-chair of the Technical Working Group at the OpenHW Group and the chair of the Functional Safety special interest group at RISC-V International.

Gael Blondelle is chief membership officer at the Eclipse Foundation AISBL. He has been working in open source since 2004 and is helping organisations collaborate in open source since he joined the Eclipse Foundation in 2013.


[1]: BBC, "Huawei's use of Android restricted by Google", 2019 [Online]. Available: [Accessed 23 November 2023]. [2]: The Linux Foundation, "Understanding Open Source Technology & US Export Controls", 2021 [Online]. Available: [Accessed 23 November 2023]. [3]: Open Source Hardware & Software Working Group, "Recommendations and Roadmap for European Sovereignty in Open Source Hardware, Software, and RISC-V Technologies", 2022 [Online]. Available: . [Accessed 23 November 2023]. [4]: Reuters, "RISC-V technology emerges as battleground in US-China tech war", October 2023 [Online]. Available: [Accessed 23 November 2023]. [5]: OpenHW, "OpenHW Group Announces CORE-V CVA6 Platform Project for RISC-V Software Development & Testing", November 2023 [Online]. Available: [Accessed 23 November 2023]. [6]: Open Source Hardware & Software Working Group, "Recommendations and roadmap for European sovereignty on open source hardware, software and RISC-V Technologies ", September 2023 [Online]. Available: [Accessed 23 November 2023].

The HiPEAC project has received funding from the European Union's Horizon Europe research and innovation funding programme under grant agreement number 101069836. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union. Neither the European Union nor the granting authority can be held responsible for them.